Semiconductor devices having TFTs are widely used in electronic devices having electronic circuits such as ICs (integrated circuits), and are used as an active matrix substrate in various display devices such as a liquid crystal display device using the active matrix driving method or an organic EL (electroluminescence) display device, for example.
If, in this semiconductor device, the semiconductor layers of the TFTs are made of polysilicon (p-Si), the carrier mobility is greater than if the semiconductor layer were made of amorphous silicon (a-Si), and thus, fast operation is possible. If peripheral circuits such as driver circuits and power source circuits are made using TFTs including semiconductor layers made of polysilicon, it is possible to integrally form the peripheral circuits into the active matrix substrate.
Such a TFT having a semiconductor layer made of polysilicon adopts a top-gate type (also referred to as a coplanar type) structure in most cases. A typical top-gate type TFT includes a semiconductor layer disposed on a base substrate, a gate insulating film covering the semiconductor layer, and a gate electrode disposed so as to overlap the center portion of the semiconductor layer through the gate insulating film. In the semiconductor layer, the channel regions in position corresponding to the gate electrodes have formed on both sides thereof high-concentration impurity regions that function as a source region or a drain region, to which an impurity is implanted at a high concentration.
Such a top gate TFT sometimes suitably uses an LDD structure as a way to alleviate the electrical field in the drain region in order to prevent characteristic deterioration due to hot carriers. The LDD-structure TFTs have low-concentration impurity regions referred to as LDD regions between the channel region and the respective high-concentration impurity regions in the semiconductor layer, and the low-concentration impurity regions mitigate the occurrence of hot carriers by alleviating the electrical field in the drain region. Below, LDD TFTs having low-concentration impurity regions on both sides of the channel region in this manner are referred to as double LDD TFTs.
In a double LDD TFT, a low-concentration impurity region is also formed in the source region where durability against hot carriers is normally unnecessary. Thus, when the TFT is ON during the operation of the TFT, the resistance of the low-concentration impurity region on the source region side becomes connected in series with the source region and the drain region, and the ON current of the TFT is reduced by the amount of resistance, which reduces operation speed.
As a TFT designed to improve ON current characteristics compared to a double LDD TFT, an LDD TFT having a low-concentration impurity region only on the drain region side is known. Below, LDD TFTs having a low-concentration impurity region on only one side of the channel region in this manner are referred to as single LDD TFTs.
The semiconductor device including a single LDD TFT can be manufactured by performing: a step of implanting an impurity at a high concentration in which after a gate electrode is formed, a resist layer is formed covering a portion where a low-concentration impurity region is formed in a single side part of the gate electrode, or in other words, the semiconductor layer, and then the impurity is implanted at a high concentration in the semiconductor layer with the resist layer as a mask; and a step of implanting an impurity at a low concentration in which, after the resist layer is removed, the impurity is implanted at a low concentration in the semiconductor layer with the gate electrode as a mask.
Such a manufacturing method had a problem in that it was necessary to add a photomask to form the resist layer that functions as a mask for the portions where the low-concentration impurity regions are to be formed in order to implant an impurity at a high concentration, which caused an increase in the number of process steps and manufacturing cost. This problem similarly occurs in a semiconductor layer having the double LDD TFT described above.
A conventional method of manufacturing a semiconductor device having LDD TFTs in which it is possible to reduce the number of photomasks and reduce the number of steps has been proposed.
For example, Patent Document 1 discloses a method in which a gate electrode is formed by patterning a conductive film by wet etching, the resist layer used in the formation of the gate electrode is used as a mask to implant an impurity at a high concentration in a semiconductor layer, and then, after removing the resist layer, an impurity is implanted at a low concentration in the semiconductor layer with the gate electrode as a mask. According to this manufacturing method, due to side etching that occurs when forming the gate electrode, the gate electrode is formed narrower than the resist layer, being recessed towards the inside of the resist layer, and it is possible to provide an offset region in which an impurity is not implanted between the high-concentration impurity region formed by the first impurity implantation and the channel region, and in each offset region, it is possible to form a low-concentration impurity region by a second impurity implantation.
Patent Document 2 discloses a method in which a low-concentration impurity region (LDD region) is formed in a self-aligned manner by forming an asymmetric resist pattern with a single side portion having a thick film part that is thick and a thin film part that is thinner than the thick film part by using a photomask or a reticle in a photolithography step for forming the gate electrode, the photomask or reticle having a complementary pattern with a light intensity-reducing function made of a diffraction grating pattern or a semi-transparent film, and then, dry etching is performed using this resist pattern, thereby forming a gate electrode having a step shape, and then, an impurity element is implanted in the semiconductor layer by having the impurity pass through the thin portion of the gate electrode.